TC510 데이터 시트보기 (PDF) - TelCom Semiconductor Inc => Microchip

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TC510

PRECISION ANALOG FRONT ENDS

TelCom Semiconductor Inc => Microchip 

PRECISION ANALOG FRONT ENDS

1 TC500

TC500A

TC510

TC514

Comparator Output

By monitoring the comparator output during the fixed

signal integrate time, the input signal polarity can be deter-

mined by the microprocessor controlling the conversion.

The comparator output is HIGH for positive signals and LOW

for negative signals during the signal-integrate phase (see

timing diagram).

During the reference deintegrate phase, the comparator

output will make a HIGH-to-LOW transition as the integrator

output ramp crosses zero. The transition is used to signal the

processor that the conversion is complete.

The internal comparator delay is 2µsec, typically. Figure

2 5 shows the comparator output for large positive and nega-

tive signal inputs. For signal inputs at or near zero volts,

however, the integrator swing is very small. If common-

mode noise is present, the comparator can switch several

times during the beginning of the signal-integrate period. To

ensure that the polarity reading is correct, the comparator

output should be read and stored at the end of the signal

integrate phase.

3 The comparator output is undefined during the Auto-

Zero Phase and is used to time the Integrator Output Zero

phase. (See Integrator Output Zero Phase of System Timing

section).

4

SIGNAL

INTEGRATE

INTEGRATOR

OUTPUT

COMPARATOR

OUTPUT

REFERENCE

DEINTEGRATE

SIGNAL

INTEGRATE

ZERO

CROSSING

INTEGRATOR

OUTPUT

COMPARATOR

OUTPUT

REFERENCE

DEINTEGRATE

ZERO

5

CROSSING

A. Positive Input Signal

B. Negative Input Signal

6

Figure 5. Comparator Output

7

TELCOM SEMICONDUCTOR, INC.

8

3-27

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