SDA 9361
VPROT:
Vertical saw-tooth voltage
Vi < V1 in first half of V-period or
Vi > V2 in second half: HD disabled
The pin SCP delivers the composite blanking signal SCP. It contains burst (Vb), H-
blanking HBL (VHBL) and selectable V-blanking (control bit SSC). The phase and width
of the H-blanking period can be varied by Ι2C Bus. For the timing following settings are
possible:
BD = 1
BD = 0, BSE = 0 (default value)
BD = 0, BSE = 1(alignment range)
SSC = 0
SSC = 1
: tBL = 0
: tHBL = tf (H-flyback time)
: tHBL = (4 * H-blanking-time + 1) / CLL
: tDBL = (H-shift + 4 * H-blanking-phase
-2 * H-blanking-time + 43) / CLL
: tBL = tVBL during V-blanking period
: tBL is always tHBL
Input Signal
HSYNC
VOH
VOHBL
VOL
t DB
t DBL
tB
t BL
UED10260
Figure 3
BG-pulse width tB
Delay to HSYNC tDB
Semiconductor Group
54 / CLL
if CLEXT = L-level: (76-4 * Internal-H-sync-phase) / CLL
if CLEXT = H-level: (38-4 * Internal-H-sync-phase) / CLL
11
1998-02-01