P2V28S20ATP-8 데이터 시트보기 (PDF) - Vanguard International Semiconductor

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P2V28S20ATP-8

128Mb SDRAM Specification

Vanguard International Semiconductor 

128Mb Synchronous DRAM

P2V28S20ATP-7,-75,-8 (4-BANK x 8,388,608-WORD x 4-BIT)

P2V28S30ATP-7,-75,-8 (4-BANK x 4,194,304-WORD x 8-BIT)

P2V28S40ATP-7,-75,-8 (4-BANK x 2,097,152-WORD x 16-BIT)

FUNCTION TRUTH TABLE (continued)

Current State /CS /RAS /CAS /WE Address

Command Action

PRE -

H X X XX

CHARGING

L H H HX

DESEL NOP (Idle after tRP)

NOP NOP (Idle after tRP)

L H H L BA

TBST ILLEGAL*2

LH

READ /

L X BA, CA, A10 WRITE ILLEGAL*2

L L H H BA, RA

ACT ILLEGAL*2

L L H L BA, A10

PRE /

NOP*4 (Idle after tRP)

PREA

L L L HX

Op-Code,

L

L

L

L Mode-Add

REFA ILLEGAL

MRS ILLEGAL

ROW

H X X XX

ACTIVATING

L H H HX

DESEL NOP (Row Active after tRCD)

NOP NOP (Row Active after tRCD)

L H H L BA

TBST ILLEGAL*2

LH

READ /

L X BA, CA, A10

ILLEGAL*2

WRIT E

L L H H BA, RA

ACT ILLEGAL*2

L L H L BA, A10

PRE /

PREA ILLEGAL*2

L L L HX

Op-Code,

L

L

L

L Mode-Add

REFA ILLEGAL

MRS ILLEGAL

JULY.2000

Page-10

Rev.2.2

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