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NJU39610

MICROSTEPPING MOTOR CONTROLLER WITH DUAL DAC

Japan Radio Corporation  

NJU39610

DA1 and DA2

These are the two outputs of DAC1 and DAC2. Input to the DACs are internal data bus (Q61 … Q01) and (Q62 …

Q02).

Reference Voltage V

Ref

V is the analog input for the two DACs. Special care in layout, gives a very low voltage drop from pin to resistor.

Ref

Any VRef between 0.0 V and VDD can be applied, but output might be non-linear above 3.0 V.

Power-on Reset

This function automatically resets all internal flip flops at power-on. This results in VSS voltage at both DAC outputs

and all digital outputs.

Reset

If Reset is not used, leave it disconnected. Reset can be used to measure leakage currents from VDD.

Time when motor is in

a compromise

position.

Time when micro

position is correct.

Write

signal.

Motor

position.

Writing to

channel 1.

Writing to

channel 2.

Write time = incorrect position

Useful time = correct

position

Double pulse write signal

Actual data = true position

Normal resolution

Figure 9. Double pulse programming, in- and output signals.

Time when motor is in

an intermediate

position.

Time when micro

position is almost

correct.

Write

signal.

Motor position. Note

that position is always

a compromise.

Writing to

channel 1.

Writing to

channel 2.

Useful time = compromise position

with equally spaced angles

Useful time = almost

correct position

Single pulse write signal

"Ideal data" = desired

position

Figure 10. Single pulse programming, in- and output signals.

Time

Ideal data = desired position

Time

Actual data = true position

Note increased resolution

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