NJG1523KB2 데이터 시트보기 (PDF) - Japan Radio Corporation
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NJG1523KB2 Datasheet PDF : 11 Pages
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NJG1523KB2
nAPPLICATION CIRCUIT
Zo=50Ω
P1
1
C1
2
Zo=50Ω
P2
3
C2
NJG1523KB2
VCTL1 (2.7V/0V)
6
C5
Zo=50Ω
5
PC
C3
4
C4
VCTL2 (0V/2.7V)
Parts List
Parts number
C1~C3
C4, C5
List 1
50~100MHz
0.01uF
10pF
List 2
0.1~0.5GHz
1000pF
10pF
List 3
0.5~2.5GHz
56pF
10pF
Notes
GRM36 MURATA
GRM36 MURATA
nRECOMMENDED PCB DESIGN
(TOP VIEW)
C2
P2
C4
C1
C5
P1
VCTL2
C3 VCTL1
PC
PCB SIZE=19.4x14.0mm
PCB: FR-4, t=0.2mm
CAPACITOR: size 1005
STRIPLINE WIDTH=0.4mm
PRECAUTIONS
[1] The DC blocking capacitors have to be placed at RF terminal of P1, P2 and PC.
Please choose appropriate capacitance values to the application frequency.
[2]To reduce stlipline influence on RF characteristics, please locate bypass
capacitors (C4, C5) close to each terminals.
[3]For good isolation, the GND terminal (2nd pin) must be placed possibly close to
ground plane of substrate, and through holes for GND should be placed near by
the pin connection.
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