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MC14007UB
PIN ASSIGNMENT
D–PB
S–PB
GATEB
S–NB
D–NB
GATEA
VSS
1
14
2
13
3
12
4
11
5
10
6
9
7
8
D = DRAIN
S = SOURCE
VDD
D–PA
OUTC
S–PC
GATEC
S–NC
D–NA
SCHEMATIC
14 13
21
11
6
12
78 3
4 5 10
9
VDD = PIN 14
VSS = PIN 7
A
B
C
INPUT
INPUT OUTPUT CONDITION
1
A = C, B = OPEN
0
A = B, C = OPEN
INPUT
12
1
3
VDD
5
14
13
6
8
A
9
B
2
4
C
11
10
Substrates of P–channel devices internally
connected to VDD; substrates of N–channel
devices internally connected to VSS.
7 VSS
Figure 1. Typical Application: 2–Input Analog Multiplexer
http://onsemi.com
2