MB90440G(2008) 데이터 시트보기 (PDF) - Fujitsu

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MB90440G
(Rev.:2008)

16-bit Proprietary Microcontroller

Fujitsu 

MB90440G Series

Pin No.

14

15

16

17

18

19

20

21

22

24

Pin name

P34

HRQ

P35

HAK

P36

RDY

P37

CLK

P40

SOT0

P41

SCK0

P42

SIN0

P43

SIN1

P44

SCK1

P45

SOT1

Circuit type

Function

General I/O port with programmable pullup. This function is enabled

in the single-chip mode or when hold function is disabled.

H

Hold request input pin. This function is enabled when the external

bus is in enable mode and the hold function is enabled.

General I/O port with programmable pullup. This function is enabled

in the single-chip mode or when hold function is disabled.

H

Hold acknowledge output pin. This function is enabled when the ex-

ternal bus is in enable mode and the hold function is enabled.

General I/O port with programmable pullup. This function is enabled

in the single-chip mode or when the external ready function is dis-

H

abled.

Ready input pin. This function is enabled when the external bus is

in enable mode and the external ready function is enabled.

General I/O port with programmable pullup. This function is enabled

in the single-chip mode or when CLK output is disabled.

H

CLK output pin. This function is enabled when the external bus is in

enable mode and CLK output is enabled.

General I/O port. This function is enabled when serial data output

of UART0 is disabled.

G

Serial data output pin for UART0. This function is enabled when

UART0 enables serial data output.

General I/O port. This function is enabled when clock output of

UART0 is disabled.

G

Serial clock I/O pin for UART0. This function is enabled when

UART0 enables serial clock output.

General I/O port. This function is always enabled.

G

Serial data input pin for UART0. Set the corresponding DDR regis-

ter to input if this function is used.

General I/O port. This function is always enabled.

G

Serial data input pin for UART1. Set the corresponding DDR regis-

ter to input if this function is used.

General I/O port. This function is enabled when serial clock output

of UART1 is disabled.

G

Serial clock I/O pin for UART1. This function is enabled when

UART1 enables serial clock output.

General I/O port. This function is enabled when serial data output

of UART1 is disabled.

G

Serial data output pin for UART1. This function is enabled when

UART1 enables serial data output.

(Continued)

8

DS07-13716-3E

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