L4949 데이터 시트보기 (PDF) - Motorola => Freescale

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L4949

MULTIFUNCTION VERY LOW DROPOUT VOLTAGE REGULATOR

Motorola => Freescale 

L4949

Reset Circuit

The block circuit diagram of the reset circuit is shown in

Figure 15.

The reset circuit supervises the output voltage. The reset

thereshold of 4.5 V is defined with the internal reference

voltage and standby output drivider.

The reset pulse delay time tRD, is defined with the charge

time of an external capacitor CT:

+ tRD

CT x 2.0 V

2.0 mA

The reaction time of the reset circuit originates from the

discharge time limitation of the reset capacitor CT and is

proportional to the value of CT. The reaction time of the reset

circuit increases the noise immunity.

Standby output voltage drops below the reset threshold

only a bit longer than the reaction time results in a shorter

reset delay time.

The nominal reset delay time will be generated for standby

output voltage drops longer than approximately 50 µs. The

typical reset output waveforms are shown in Figure 16.

Figure 16. Typical Reset Output Waveforms

Vout

Vin

40 V

5.0 V

VRT + 0.1 V

UKT

Vout1

3.0 V

t

tR

Figure 15. Reset Circuit

1.23 V Vref

2.0 µA

22 k

Out

Reg

CT

+

– 2.0 V

Reset

Reset

tRD

tRD

tRR

Switch On

Input Drop Dump

Output

Overload

Switch Off

Sense Comparator

The sense comparator compares an input signal with an

internal voltage reference of typical 1.23 V. The use of an

external voltage divider makes this comparator very flexible

in the application.

It can be used to supervise the input voltage either before

or after the protection diode and to give additional information

to the microprocessor like low voltage warnings.

MOTOROLA ANALOG IC DEVICE DATA

7

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