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HD74BC573AFPEL 데이터 시트보기 (PDF) - Renesas Electronics

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HD74BC573AFPEL Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
HD74BC573A
Octal D Type Transparent Latches With 3 State Outputs
REJ03D0287–0300Z
(Previous ADE-205-021A (Z))
Rev.3.00
Jul.16.2004
Description
The HD74BC573A provides high drivability and operation equal to or better than high speed bipolar standard logic IC
by using Bi-CMOS process. The device features low power dissipation that is about 1/5 of high speed bipolar logic IC,
when the frequency is 10 MHz. The device has eight D type latches with three state outputs in a 20 pin package. When
the latch enable input is high, the Q outputs will follow the D inputs. When the latch enable goes low, data at the D
inputs will be retained at the outputs until latch enable returns high again. When a high logic level is applied to the
output control input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs
and the state of the storage elements.
Features
Input/Output are at high impedance state when power supply is off.
Built in input pull up circuit can make input pins be open, when not used.
TTL level input
Wide operating temperature range
Ta = –40 to + 85°C
Ordering Information
Part Name
Package Type
Package Code
Package
Abbreviation
HD74BC573AP
DILP-20 pin
DP-20N, -20NEV P
HD74BC573AFPEL
SOP-20 pin (JEITA) FP-20DAV
FP
Note: Please consults the sales office for the above package availability.
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
Function Table
Output Control
Latch Enable
Data
L
H
H
L
H
L
L
L
X
H
X
X
H : High leve
L : Low level
X : Immaterial
Z : High impedance
Q0 : Level of Q before the indicated steady input conditions were established
Output Q
H
L
Q0
Z
Rev.3.00, Jul.16.2004, page 1 of 8

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