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FS6128-01

PLL Clock Generator IC with VCXO

Unspecified 

AMERICAN MICROSYSTEMS, INC.

FS6128-01

PLL Clock Generator IC with VCXO

April 2000

Table 6: AC Timing Specifications

Unless otherwise stated, VDD = 3.3V ± 10%, no load on any output, and ambient temperature range TA = 0°C to 70°C. Parameters denoted with an asterisk ( * ) represent nominal characterization

data and are not production tested to any specific limits. Where given, MIN and MAX characterization data are ± 3σ f rom typical.

PARAMETER

SYMBOL

CONDITIONS/DESCRIPTION

MIN. TYP. MAX. UNITS

Overall

VCXO Stabilization Time *

PLL Stabilization Time *

Synthesis Error

Clock Output (CLK)

Duty Cycle *

Jitter, Period (peak-peak) *

Jitter, Long Term (σy(τ )) *

Rise Time *

Fall Time *

tVCXOSTB

tPLLSTB

From power valid

From VCXO stable

(unless otherwise noted in Frequency Table)

10

ms

500

us

0

ppm

Ratio of high pulse width (as measured from rising

edge to next falling edge at VDD/2) to one clock period

45

55

%

tj(∆P)

From rising edge to next rising edge at VDD/2,

CL = 10pF

tj(LT)

From 0-500µs at VDD/2, CL = 10pF

compared to ideal clock source

390

ps

155

ps

tr

VDD = 3.3V; VO = 0.3V to 3.0V; CL = 10pF

1.7

ns

tf

VDD = 3.3V; VO = 3.0V to 0.3V; CL = 10pF

1.7

ns

ISO9001

5

4.24.00

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