CS5317 데이터 시트보기 (PDF) - Cirrus Logic

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CS5317

16-Bit, 20 kHz Oversampling A/D Converter

Cirrus Logic 

CS5317

Initial Sampling

The CS5317 samples the analog input, AIN, at

one-half the master clock frequency (~2.5 MHz

max). The input sampling frequency, fsin, appears

at CLKOUT regardless of whether the master

clock is generated on-chip (CLKG1 and CLKG2

modes) or driven directly into the CS5317

(CLKOR mode). The digital filter then processes

the input signal at the input sample rate.

Like any sampled-data filter, though, the digital

filter’s passband spectrum repeats around integer

multiples of the sample rate, fsin. That is, when

the CS5317 is operating at its full-rated speed any

Mag H(ejω ) (dB)

0

-2.74 dB

noise within ± 5 kHz bands around 2.5 MHz, 5

MHz, 7.5 MHz, etc. will pass unfiltered and alias

into the baseband. Such noise can only be filtered

by analog filtering before the signal is sampled.

Since the signal is heavily oversampled (2.5

MHz : 5 kHz, or 500 : 1), a single-pole passive

RC filter can be used as shown in Figure 2.

Input

Signal

AIN

1.2 K

0.01µF

Note: Any nonlinearities contributed by this filter

will be encoded as distortion by the CS5317.

Therefore a low distortion, high frequency ca-

pacitor such as COG-ceramic is recommended.

Figure 2. Anti-alias Filter

-40

-80

f

0 .25 F .5 F F

2F

3F

3

sin(128πƒT)





128sin(πƒT)







=

Magnitude where: T = 1/ƒsin

ƒsin = input sampling frequency = CLKOUT frequency for all modes

= CLKIN/2 in CLKOR mode

= CLKIN*128 in CLKG1 mode

= CLKIN*256 in CLKG2 mode

F = ƒsin/128 for all modes

ƒ = input frequency

ƒsout = ƒsin/128 = output data rate for CLKOR & CLKG1 = F

ƒsout = ƒsin/256 = output data rate for CLKG2 = F/2

Examples:

For ƒsin = 2.56 MHz at ƒ = 5 kHz: Magnitude is -2.74 dB

For ƒsin = 2.56 MHz at ƒ = 10 kHz: Magnitude is -11.8 dB

Figure 3. CS5317 Low-Pass Filter Response

DS27F4

9

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