IDT54FCT646P 데이터 시트보기 (PDF) - Integrated Device Technology
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IDT54FCT646P Datasheet PDF : 8 Pages
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IDT54/74FCT646/A/C
FAST CMOS OCTAL TRANSCEIVER/REGISTER
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
VCC
7.0V
VIN
Pulse
Generator
V OUT
D.U.T.
500Ω
50pF
500Ω
RT
CL
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCH POSITION
Test
Switch
Open Drain
Disable Low
Enable Low
Closed
All Other Tests
Open
DEFINITIONS:
2536 tbl 08
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
SET-UP, HOLD AND RELEASE TIMES
DATA
INPUT
t SU
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
t SU
tH
t REM
tH
PULSE WIDTH
3V
1.5V
0V
3V
1.5V
0V
LOW-HIGH-LOW
PULSE
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
3V
1.5V
0V
1.5V
tW
1.5V
PROPAGATION DELAY
SAME PHASE
INPUT TRANSITION
tPLH
t PHL
OUTPUT
t PLH
tPHL
OPPOSITE PHASE
INPUT TRANSITION
ENABLE AND DISABLE TIMES
3V
1.5V
0V
VOH
1.5V
VOL
3V
1.5V
0V
ENABLE
CONTROL
INPUT
OUTPUT
NORMALLY
LOW
t PZL
SWITCH
CLOSED
t PZH
OUTPUT SWITCH
NORMALLY OPEN
HIGH
3.5V
1.5V
1.5V
0V
DISABLE
tPLZ
3V
1.5V
0V
3.5V
t PHZ
0.3V V OL
0.3V V OH
0V
NOTES
2536 drw 07
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0 MHz; ZO ≤ 50Ω; tF ≤ 2.5ns;
tR ≤ 2.5ns.
7.18
7
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