AU7842 데이터 시트보기 (PDF) - Unspecified
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AU7842 Datasheet PDF : 17 Pages
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MVSILICON
AU7842 USB HOST MP3/WMA DECODER SOC
SD_CMD
SD_DAT
IR
DAC_HPOUTL
DAC_HPOUTR
DAC_VREF
P3[7:4]
P3[3:0]
P2[7:5]
P2[4:3]
P2[2:0]
P1[7:4]
P1[3:0]
P0[1]
P0[0]
GPIO[7:3]
GPIO[2:0]
XIN
XOUT
RESETn
DEBUG
DAC_AVDD
DAC_AVSS
PLL_VSS
PLL_VDD
IO_VDD
VSS
VDD
Reserved
53
I/O
54
I/O
75
I
3
AO
1
AO
5
AO
86:83
72:69
17:15
87:88
98:100
47:44
29:26
56
55
80:76
50:48
I/OD
I/OD
I/OD
I/OD
I/OD
I/OD
I/OD
I/OD
I/OD
I/O
I/O
12
I
13
O
21
I
89
I
4
PWR
2
GND
6
GND
7
PWR
11
PWR
37
52
73
94
8
GND
20
33
42
59
81
14
PWR
32
43
60
68
82
74
SD Card command line
SD Card data line
Remote control pin
Inferred remote controller signal
DAC AUDIO interface pins
Head phone left channel output
Head phone right channel output
Internal voltage reference
GPIO/MCU IO pins
MCU P3 PORT
MCU P3 PORT
MCU P2 PORT
MCU P2 PORT
MCU P2 PORT
MCU P1 PORT
MCU P1 PORT
MCU P0 PORT
MCU P0 PORT
GPIO PORT
GPIO PORT
CLK & Reset pins
Crystal oscillator input for PLL
Crystal oscillator output for PLL
System reset, active low
Debug pin
When tied high, chip enter into debug mode and use
external emulator. When tie low, chip works in normal
mode
Power/Ground pins
Analog power for DAC(3.3V)
Analog ground for DAC
Analog ground for PLL
Analog power for PLL(1.8V)
Digital power for I/O(3.3V)
Digital IO/core ground
Digital power for core (1.8V)
NC
Shanghai Mountain View Silicon Technology Co Ltd
http://www.mvsilicon.com
6
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