AD9430BSVZ-170 데이터 시트보기 (PDF) - Analog Devices
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AD9430BSVZ-170 Datasheet PDF : 44 Pages
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400
80
ANALOG SUPPLY
350
CURRENT CMOS
MODE
300
60
250
ANALOG SUPPLY
OUTPUT SUPPLY
CURRENT LVDS
CURRENT LVDS
MODE
200 MODE
40
150
100
20
OUTPUT SUPPLY
CURRENT CMOS
50
MODE
0
0
100
120
140
160
180
200
220
ENCODE (MSPS)
Figure 30. IAVDD and IDRVDD vs. Clock Rate (AIN = 10.3 MHz @ –0.5 dBFS)
170 MSPS Grade, CLOAD = 5 pF
450
90
ANALOG SUPPLY
400 CURRENT LVDS MODE
80
350
ANALOG SUPPLY
70
CURRENT CMOS MODE
300
60
250
OUTPUT SUPPLY
50
CURRENT LVDS MODE
200
40
150
30
100
OUTPUT SUPPLY
20
CURRENT CMOS MODE
50
10
0
0
100 120 140 160 180 200 220 240
ENCODE (MSPS)
Figure 31. IAVDD and IDRVDD vs. Clock Rate
(AIN = 10.3 MHz @ –0.5 dBFS), 210 MSPS Grade, CLOAD = 5 pF
85
80
SFDR
75
70
SNR
65
SINAD
60
55
50
10
20
30
40
50
60
70
80
90
ENCODE POSITIVE DUTY CYCLE (%)
Figure 32. SINAD and SFDR vs. Clock Pulse Width High
(AIN = 10.3 MHz @ –0.5 dBFS, 170 MSPS, LVDS)
AD9430
80
SFDR
75
70
65
SNR
SINAD
60
55
50
20
30
40
50
60
70
80
ENCODE POSITIVE DUTY CYCLE (%)
Figure 33. SNR, SINAD, and SFDR vs. ENCODE Pulse Width High,
(AIN = 10.3 MHz @ –0.5 dBFS, 210 MSPS, LVDS)
1.4
1.2
RO = 13Ω TYP
1.0
0.8
0.6
0.4
0.2
0
0
1
2
3
4
5
6
7
8
ILOAD (mA)
Figure 34. VREFOUT vs. ILOAD
2.0
1.5
1.0
0.5
% GAIN ERROR
USING EXT REF
0
–0.5
–1.0
–1.5
–2.0
–50 –30 –10
10
30
50
70
90 95
TEMPERATURE (°C)
Figure 35. Full-Scale Gain Error vs. Temperature
(AIN = 10.3 MHz @ –0.5 dBFS, 170 MSPS/210 MSPS, LVDS)
Rev. E | Page 19 of 44
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