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AD9100(RevA) 데이터 시트보기 (PDF) - Analog Devices

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AD9100
(Rev.:RevA)
ADI
Analog Devices ADI
AD9100 Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD9100
Parameter
Conditions
Temp
Test AD9100AE/SE/JD/AD/SD3
Level Min Typ
Max Units
HOLD-TO-TRACK SWITCHING
Acquisition Time to 0.1%
Acquisition Time to 0.01%
Acquisition Time to 0.01%
2 V Step
2 V Step
4 V Step
25°C
V
Full
IV
25°C
V
13
ns
16
23
ns
20
ns
POWER SUPPLY
Power Dissipation
+VS Current
–VS Current
Full
VI
Full
VI
Full
VI
1.05 1.25 W
96
118 mA
116
132 mA
NOTES
1Absolute maximum ratings are limiting values to be applied individually, and beyond which the serviceability of the circuit may be impaired. Functional operability
OBSOLETE is not necessarily implied. Exposure to absolute maximum rating conditions for an extended period of time may affect device reliability.
2Analog input voltage should not exceed ± VS.
3AD9100JD: 0°C to +70°C. AD9100AD: –40°C to +85°C. AD9100SD: –55°C to +125°C. DIP θJA = 38°C/W; this is valid with the device mounted flush to a
grounded 2 oz copper clad board with 16 sq inches of surface area and no air flow. LCC θJA = 48°C/W.
4The input to the AD9100 is internally clamped at ± 2.3 V. The internal input series resistance is nominally 50 .
5Hold mode noise is proportional to the length of time a signal is held. For example, if the hold time (t H) is 20 ns, the accumulated noise is typically 6 µV (300 V/s ϫ
20 ns). This value must be combined with the track mode noise to obtain total noise.
6Min and max droop rates are based on the military temperature range (–55°C to +125°C). Refer to the “Droop Rate vs Temperature” chart for min/max limits over
the commercial and industrial ranges.
Specifications subject to change without notice
APERTURE
+2V
DELAY
(0.8ns)
ANALOG 0V
INPUT
ACQUISITION TIME
(16ns)
HOLD
VOLTAGE
LEVEL
HELD
–2V
TO
+2V
TRACK
SWITCH
DELAY
TIME
OBSERVED AT
HOLD CAPACITOR
TRACK TO
HOLD
SETTLING
(4ns)
OBSERVED AT
(7ns)
HOLD CAPACITOR/
ANALOG OUTPUT 0V
ANALOG OUTPUT
–2V
"1"
CLOCK
INPUTS
"0"
"HOLD"
CLOCK (PIN #19)
"TRACK"
CLOCK
AD9100 Timing Diagram (1 ns/div)
"HOLD"
EXPLANATION OF TEST LEVELS
Test Level
I – 100% production tested.
II – 100% production tested at +25°C, and sample tested at
specified temperatures.
III – Periodically sample tested.
IV – Parameter is guaranteed by design and characterization
testing.
V – Parameter is a typical value only.
VI – All devices are 100% production tested at +25°C. 100%
production tested at temperature extremes for extended
temperature devices; sample tested at temperature
extremes for commercial/industrial devices.
ORDERING GUIDE
Model1
AD9100JD
AD9100AD
AD9100AE
AD9100SD
AD9100SE
Temperature
Range
0°C to +70°C
–40°C to +85°C
–40°C to +85°C
–55°C to +125°C
–55°C to +125°C
Package
Package
Description Option
Ceramic DIP D-28
Ceramic DIP D-28
Ceramic LCC E-28A
Ceramic DIP D-28
Ceramic LCC E-28A
NOTE
lConsult factory about availability of parts screened to MIL-STD-883.
REV. A
–3–

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