AD7482BST 데이터 시트보기 (PDF) - Analog Devices
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AD7482BST Datasheet PDF : 16 Pages
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AD7482
0
–10
100mV p-p SINE WAVE ON SUPPLY PINS
–20
–30
–40
–50
–60
–70
–80
10
100
FREQUENCY – kHz
1000
TPC 7. PSRR without Decoupling
0.0004
0
–0.0004
–0.0008
–0.0012
–0.0016
–0.0020
–55
–25
5
35
65
TEMPERATURE – ؇C
95
125
TPC 8. Reference Out Error
AC
SIGNAL
1k⍀
+VS
8
100⍀
3+
7
BIAS 1k⍀
VOLTAGE
AD829
6
VIN
2–
4
5
1
–VS
220pF
150⍀
Figure 1. Analog Input Circuit Used for 10 kHz Input Tone
+VS
8
AC 50⍀
SIGNAL
2+
7
BIAS 220⍀
VOLTAGE
AD8021
6
3–
4
VIN
5
1
10pF
220⍀ –VS
10pF
Figure 2. Analog Input Circuit Used for 1 MHz Input Tone
Figure 1 shows the analog input circuit used to obtain the
data for the FFT plot shown in TPC 1. The circuit uses an
Analog Devices AD829 op amp as the input buffer. A bipolar
analog signal is applied as shown and biased up with a stable,
low noise dc voltage connected to the labeled terminal
shown. A 220 pF compensation capacitor is connected be-
tween Pin 5 and the AD829 and the analog ground plane.
The AD829 is supplied with +12 V and –12 V supplies. The
supply pins are decoupled as close to the device as possible
with both a 0.1 F and 10 F capacitor connected to each
pin. In each case, 0.1 F capacitor should be the closer of
the two caps to the device. More information on the AD829
is available on the Analog Devices website.
For higher input bandwidth applications, Analog Devices’
AD8021 op amp (also available as a dual AD8022) is the
recommended choice to drive the AD7482. Figure 2 shows
the analog input circuit used to obtain the data for the FFT
plot shown in TPC 2. A bipolar analog signal is applied to
the terminal shown and biased up with a stable, low noise dc
voltage connected as shown. A 10 pF compensation capacitor
is connected between Pin 5 of the AD8021 and the negative
supply. As with the previous circuit, the AD8021 is supplied
with +12 V and –12 V supplies. The supply pins are decoupled
as close to the device as possible, with both a 0.1 µF and 10 µF
capacitor connected to each pin. In each case, the 0.1 µF capaci-
tor should be the closer of the two caps to the device. The
AD8021 logic reference pin is tied to analog ground and the
DISABLE Pin is tied to the positive supply as shown. Detailed
information on the AD8021 is available on the Analog
Devices website.
–8–
REV. 0
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