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74VHCT573A(1999) 데이터 시트보기 (PDF) - Fairchild Semiconductor

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74VHCT573A
(Rev.:1999)
Fairchild
Fairchild Semiconductor Fairchild
74VHCT573A Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
AC Electrical Characteristics
Symbol
Parameter
VCC
TA = 25°C
TA = −40°C to +85°C
Units
(V)
Min
Typ
Max
Min
Max
Conditions
tPLH
tPHL
tPLH
tPHL
tPZL
tPZH
tPLZ
tPHZ
tOSLH
tOSHL
CIN
COUT
CPD
Propagation Delay Time
(LE to On)
Propagation Delay Time
(D to On)
3-STATE Output
Enable Time
3-STATE Output
Disable Time
Output to Output
Skew
Input Capacitance
Output Capacitance
Power Dissipation
Capacitance
5.0 ± 0.5
5.0 ± 0.5
5.0 ± 0.5
5.0 ± 0.5
5.0 ± 0.5
7.7
12.3
1.0
13.5
ns
8.5
13.3
1.0
14.5
CL = 15 pF
CL = 50 pF
5.1
8.5
1.0
9.5
ns
5.9
9.5
1.0
10.5
CL = 15 pF
CL = 50 pF
6.3
10.9
1.0
12.5
ns RL = 1 kCL = 15 pF
7.1
11.9
1.0
13.5
CL = 50 pF
8.8
11.2
1.0
12.0
ns RL = 1 kCL = 50 pF
(Note 8)
1.0
1.0
ns
4
10
6
25
10
pF VCC = Open
pF VCC = 5.0V
(Note 9)
pF
Note 8: Parameter guaranteed by design. tOSLH = |tPLH max tPLH min|; tOSHL = |tPHL max tPHL min|
Note 9: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average
operating current can be obtained by the equation: ICC (opr.) = CPD * VCC * fIN + ICC/8 (per F/F). The total CPD when n pcs. of the Latch operates can be cal-
culated by the equation: CPD(total) = 14 + 13n.
AC Operating Requirements
Symbol
Parameter
tW(H)
tS
tH
Minimum Pulse Width (LE)
Minimum Setup Time
Minimum Hold Time
VCC
(V)
5.0 ± 0.5
5.0 ± 0.5
5.0 ± 0.5
TA = 25°C
Min
Typ
Max
6.5
1.5
3.5
TA = −40°C to +85°C
Min
Max
8.5
1.5
3.5
Units
ns
ns
ns
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