MPC9100FA 데이터 시트보기 (PDF) - Motorola => Freescale

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MPC9100FA

Dual PLL Clock Generator

Motorola => Freescale 

MPC9100

Pinout: 32–Lead TQFP Package (Top View)

Q_31

VCCO_31

GNDA1

FCAPB1P

FCAPB1

FCAPA1P

FCAPA1

VCCA1

24 23 22 21 20 19 18 17

25

16

26

15

27

14

28

13

MPC9100

29

12

30

11

31

10

32

9

12345678

Q_14

VCCO_14

GNDA2

FCAPB2P

FCAPB2

FCAPA2P

FCAPA2

VCCA2

LOGIC DIAGRAM

TCLK

XTAL1

XTAL2

XTAL

OSC

TEST0

TEST1

TEST2

PLL#1

Divider

TEST

LOGIC

PLL#2

Divider

Q_31

Q_14

Q_45

MOTOROLA

2

TIMING SOLUTIONS

BR1333 — REV 5

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