SI4925DY 데이터 시트보기 (PDF) - Fairchild Semiconductor
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SI4925DY Datasheet PDF : 5 Pages
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January 2001
Si4925DY
Dual P-Channel, Logic Level, PowerTrench® MOSFET
General Description
These P-Channel Logic Level MOSFETs are produced
using Fairchild Semiconductor's advanced PowerTrench
process that has been especially tailored to minimize the
on-state resistance and yet maintain low gate charge for
superior switching performance.
These devices are well suited for notebook computer
applications: load switching and power management,
battery charging circuits, and DC/DC conversion.
Features
-6 A, -30 V. RDS(ON) = 0.032 Ω @ VGS = -10 V,
RDS(ON) = 0.045 Ω @ VGS = -4.5 V.
Low gate charge (14.5nC typical).
High performance trench technology for extremely low
RDS(ON).
High power and current handling capability.
SOT-23
SuperSOTTM-6
SuperSOTTM-8
D2
D2
D1
D1
4925
SO-8
G2
S2
pin 1
G1
S1
SO-8
SOT-223
5
6
7
8
Absolute Maximum Ratings
Symbol Parameter
TA = 25oC unless otherwise noted
VDSS
Drain-Source Voltage
VGSS
Gate-Source Voltage
ID
Drain Current - Continuous
- Pulsed
(Note 1a)
PD
Power Dissipation for Dual Operation
Power Dissipation for Single Operation (Note 1a)
(Note 1b)
(Note 1c)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
RθJA
Thermal Resistance, Junction-to-Ambient (Note 1a)
RθJC
Thermal Resistance, Junction-to-Case (Note 1)
© 2001 Fairchild Semiconductor International
Si4925DY
-30
±20
-6
-20
2
1.6
1
0.9
-55 to 150
78
40
SOIC-16
4
3
2
1
Units
V
V
A
W
°C
°C/W
°C/W
Si4925DY Rev.A
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