SL74HC221N 데이터 시트보기 (PDF) - System Logic Semiconductor
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SL74HC221N Datasheet PDF : 6 Pages
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SL74HC221
Dual Monostable Multivibrator
The SL74HC221 is identical in pinout to the LS/ALS221. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
There are two trigger inputs, A INPUT (negative edge) and
B INPUT (positive edge). These inputs are valid for rising/falling
signals
The device may also be triggered by using the CLR input (positive-
edge) because of the Schmitt-trigger input; after triggering the output
maintains the MONOSTABLE state for the time period determined by
the external resistor RX and capacitor CX. Taking CLR low breaks this
MONOSTABLE STATE. If the next trigger pulse occurs during the
MONOSTABLE period it makes the MONOSTABLE period longer.
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 3.0 to 6.0 V
• Low Input Current: 1.0 µA
• High Noise Immunity Characteristic of CMOS Devices
LOGIC DIAGRAM
ORDERING INFORMATION
SL74HC221N Plastic
SL74HC221D SOIC
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
PIN 16 =VCC
PIN 8 = GND
Note
(1) CX, RX, DX are external components.
(2) DX is a clamping diode.
The external capacitor is charged to VCC in the stand-by
state, i.e. no trigger. When the supply voltage is turned off
CX is discharged mainly through an internal parasitic diode.
If CX is sufficiently large and VCC decreases rapidy, there will
be some possibility of damaging the I.C. with a surge
current or latch-up. If the voltage supply filter capacitor is
large enough and VCC decrease slowly, the surge current is
automatically limited and damage the I.C. is avoided. The
maximum forward current of the parasitic diode is
approximately 20 mA.
FUNCTION TABLE
Inputs
A B CLR
HH
Outputs
QQ
XL
H
L* H*
HX
H
L* H*
L
H
LH
XX L
LH
X = don’t care
* - except for monostable period
Note
Output
Enable
Inhibit
Inhibit
Output
Enable
Output
Enable
Inhibit
SLS
System Logic
Semiconductor
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