AT93C86A-10PU-1.8 데이터 시트보기 (PDF) - Atmel Corporation

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AT93C86A-10PU-1.8

Three-wire Serial EEPROM 16K (2048 x 8 or 1024 x 16)

Atmel Corporation 

AT93C86A

Table 5. Instruction Set for the AT93C86A

Address

Instruction SB Op Code

x8

x 16

READ

1

10

A10 – A0

A9 – A0

EWEN

1

00

11XXXXXXXXX 11XXXXXXXX

ERASE

1

11

A10 – A0

A9 – A0

WRITE

1

01

A10 – A0

A9 – A0

ERAL

1

00

10XXXXXXXXX 10XXXXXXXX

WRAL

1

00

01XXXXXXXXX 01XXXXXXXX

EWDS

1

00

00XXXXXXXXX 00XXXXXXXX

Data

x8

x 16

D7 – D0 D15 – D0

D7 – D0 D15 – D0

Comments

Reads data stored in memory,

at specified address.

Write enable must precede all

programming modes.

Erases memory location An – A0.

Writes memory location An – A0.

Erases all memory locations.

Valid only at VCC = 4.5V to 5.5V.

Writes all memory locations.

Valid when VCC = 4.5V to 5.5V and

Disable Register cleared.

Disables all programming

instructions.

Functional

Description

The AT93C86A is accessed via a simple and versatile three-wire serial communication

interface. Device operation is controlled by seven instructions issued by the host pro-

cessor. A valid instruction starts with a rising edge of CS and consists of a Start Bit

(logic “1”) followed by the appropriate Op Code and the desired memory address

location.

READ (READ): The Read (READ) instruction contains the address code for the mem-

ory location to be read. After the instruction and address are decoded, data from the

selected memory location is available at the serial output pin DO. Output data changes

are synchronized with the rising edges of serial clock SK. It should be noted that a

dummy bit (logic “0”) precedes the 8- or 16-bit data output string. The AT93C86A sup-

ports sequential read operations. The device will automatically increment the internal

address pointer and clock out the next memory location as long as CS is held high. In

this case, the dummy bit (logic “0”) will not be clocked out between memory locations,

thus allowing for a continuous stream of data to be read.

ERASE/WRITE (EWEN): To assure data integrity, the part automatically goes into the

Erase/Write Disable (EWDS) state when power is first applied. An Erase/Write Enable

(EWEN) instruction must be executed first before any programming instructions can be

carried out. Please note that once in the EWEN state, programming remains enabled

until an EWDS instruction is executed or VCC power is removed from the part.

ERASE (ERASE): The Erase (ERASE) instruction programs all bits in the specified

memory location to the logical “1” state. The self-timed erase cycle starts once the

ERASE instruction and address are decoded. The DO pin outputs the Ready/Busy sta-

tus of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS). A

logic “1” at pin DO indicates that the selected memory location has been erased, and the

part is ready for another instruction.

WRITE (WRITE): The Write (WRITE) instruction contains the 8 or 16 bits of data to be

written into the specified memory location. The self-timed programming cycle tWP starts

after the last bit of data is received at serial data input pin DI. The DO pin outputs the

Ready/Busy status of the part if CS is brought high after being kept low for a minimum of

5

3408H–SEEPR–1/07

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