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74LVC125APW-Q100J 데이터 시트보기 (PDF) - Nexperia B.V. All rights reserved

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74LVC125APW-Q100J
NEXPERIA
Nexperia B.V. All rights reserved NEXPERIA
74LVC125APW-Q100J Datasheet PDF : 13 Pages
First Prev 11 12 13
Nexperia
74LVC125A-Q100
Quad buffer/line driver with 5 V tolerant inputs/outputs; 3-state
12. Abbreviations
Table 10. Abbreviations
Acronym
CMOS
DUT
ESD
HBM
MIL
MM
TTL
Description
Complementary Metal-Oxide Semiconductor
Device Under Test
ElectroStatic Discharge
Human Body Model
Military
Machine Model
Transistor-Transistor Logic
13. Revision history
Table 11. Revision history
Document ID
74LVC125A_Q100 v.2
Modifications:
74LVC125A_Q100 v.1
Release date Data sheet status
20200505
Product data sheet
Change notice Supersedes
-
74LVC125A_Q100 v.1
The format of this data sheet has been redesigned to comply with the identity
guidelines of Nexperia.
Legal texts have been adapted to the new company name where appropriate.
Section 2 updated.
Table 4: Derating values for Ptot total power dissipation updated.
Table 8: added measurement points for VX and VY.
Fig. 11: Package outline drawing SOT762-1 (DHVQFN14) updated.
20130404
Product data sheet
-
-
74LVC125A_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 5 May 2020
© Nexperia B.V. 2020. All rights reserved
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