SL4013BN 데이터 시트보기 (PDF) - System Logic Semiconductor
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SL4013BN Datasheet PDF : 5 Pages
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SL4013B
AC ELECTRICAL CHARACTERISTICS(CL=50pF, RL=200 kΩ, Input tr=tf=20 ns)
Symbol
Parameter
fmax Maximum Clock Frequency (Figure 1)
tPLH, tPHL Maximum Propagation Delay, Clock to Q or Q
(Figure 1)
tPLH Maximum Propagation Delay, Set to Q or Reset
to Q (Figure 2)
tPHL Maximum Propagation Delay, Set to Q or Reset
to Q (Figure 2)
tTLH, tTHL Maximum Output Transition Time, Any Output
(Figure 1)
CIN
Maximum Input Capacitance
VCC
Guaranteed Limit
V ≥-55°C 25°C ≤125°C
5.0 3.5
10
8
15
12
3.5
1.75
8
4
12
6
5.0 300
300
600
10
130
130
260
15
90
90
180
5.0 300
300
600
10
130
130
260
15
90
90
180
5.0 400
400
800
10
170
170
340
15
120
120
240
5.0 200
200
400
10
100
100
200
15
80
80
160
-
7.5
Unit
MHz
ns
ns
ns
ns
pF
TIMING REQUIREMENTS(CL=50pF, RL=200 kΩ, Input tr=tf=20 ns)
Symbol
Parameter
tw
Minimum Pulse Width, Clock (Figure 1)
tw
Minimum Pulse Width, Set or Reset (Figure 2)
tsu
Minimum Setup Time, Data to Clock
(Figure 3)
th
Minimum Hold Time, Clock to Data
(Figure 3)
tr, tf Maximum Input Rise or Fall Time, Clock (Figure
1)
VCC
Guaranteed Limit
V ≥-55°C 25°C ≤125°C Unit
5.0 140
140
280
ns
10
60
60
120
15
40
40
80
5.0 180
180
360
ns
10
80
80
160
15
50
50
100
5.0
40
40
80
ns
10
20
20
40
15
15
15
30
5.0
5
5
10
ns
10
5
5
10
15
5
5
10
5.0 500
10
30
15
6
500
1000
µs
30
60
6
12
SLS
System Logic
Semiconductor
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