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AD8598

Dual 7 ns Single Supply Comparator

Analog Devices 

AD8598

The input bias current for the AD8598 is 3 µA. As with any

PNP differential input stage, this bias current will go to zero on

an input that is high and will double on an input that is low.

Care should be taken in choosing resistor values to be con-

nected to the inputs as large resistors could cause significant

voltage drops due to the input bias current.

The input capacitance for the AD8598 is typically 3 pF. This is

measured by inserting a 5 kΩ source resistance to the input and

measuring the change in propagation delay.

Using Hysteresis

Hysteresis can easily be added to a comparator through the

addition of positive feedback. Adding hysteresis to a comparator

offers an advantage in noisy environments where it is not desir-

able for the output to toggle between states when the input

signal is near the switching threshold. Figure 17 shows a

method for configuring the AD8598 with hysteresis.

SIGNAL

COMPARATOR

R1

R2

VREF

CF

Figure 17. Configuring the AD8598 with Hysteresis

The input signal is directly connected to the noninverting input

of the comparator. The output is fed back to the inverting input

through R1 and R2. The ratio of R1 to R1 + R2 establishes the

width of the hysteresis window with VREF setting the center of

the window, or the average switching voltage. The Q output will

switch high when the input voltage is greater than VHI and will

not switch low again until the input voltage is less than VLO as

given in Equation 1:

( ) V HI = V + –1–V REF

R1

R1+ R2

+V

REF

V LO

= V REF



1–

R1 

R1+ R2

(1)

where V+ is the positive supply voltage.

The capacitor, CF, can also be added to introduce a pole into the

feedback network. This has the effect of increasing the amount of

hysteresis at high frequencies. This can be useful when comparing

a relatively slow signal in a high frequency noise environment. At

1

frequencies

greater

than

fP

=

2π

CF

,

R2

the

hysteresis

window

approaches VHI = V+ – 1 V and VLO = 0 V. At frequencies less

than fP the threshold voltages remain as in Equation 1.

–8–

REV. A

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