24AA16T-EP 데이터 시트보기 (PDF) - Unspecified

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24AA16T-EP

16K I2C™ Serial EEPROM

Unspecified 

24AA16/24LC16B

5.0 DEVICE ADDRESSING

A control byte is the first byte received following the

Start condition from the master device (Figure 5-1).

The control byte consists of a four-bit control code.

For the 24XX16, this is set as ‘1010’ binary for read

and write operations. The next three bits of the control

byte are the block-select bits (B2, B1, B0). They are

used by the master device to select which of the eight

256 word-blocks of memory are to be accessed.

These bits are in effect the three Most Significant bits

(MSb) of the word address. It should be noted that the

protocol limits the size of the memory to eight blocks

of 256 words, therefore, the protocol can support only

one 24XX16 per system.

The last bit of the control byte defines the operation to

be performed. When set to ‘1’, a read operation is

selected. When set to ‘0’, a write operation is selected.

Following the Start condition, the 24XX16 monitors the

SDA bus, checking the device type identifier being

transmitted and, upon receiving a ‘1010’ code, the

slave device outputs an Acknowledge signal on the

SDA line. Depending on the state of the R/W bit, the

24XX16 will select a read or write operation.

Operation

Control

Code

Block Select

R/W

Read

1010 Block Address 1

Write

1010 Block Address 0

FIGURE 5-1:

CONTROL BYTE

ALLOCATION

Control Code

Read/Write Bit

Block

Select

Bits

S 1 0 1 0 B2 B1 B0 R/W ACK

Slave Address

Start Bit

Acknowledge Bit

FIGURE 5-2:

ADDRESS SEQUENCE BIT ASSIGNMENTS

Control Byte

1

0

1

0

B

2

B

1

B

0

R/W

Control

Code

Block

Select

bits

Address Low Byte

A

7

•

•

•

•

•

•

A

0

© 2009 Microchip Technology Inc.

DS21703H-page 7

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