24AA04-E/OTG 데이터 시트보기 (PDF) - Unspecified

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24AA04-E/OTG

4K I2C™ Serial EEPROM

Unspecified 

24AA04/24LC04B

8.0 PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 8-1.

TABLE 8-1: PIN FUNCTION TABLE

Name

A0

A1

A2

VSS

SDA

SCL

WP

VCC

PDIP

1

2

3

4

5

6

7

8

SOIC

1

2

3

4

5

6

7

8

TSSOP

1

2

3

4

5

6

7

8

DFN

1

2

3

4

5

6

7

8

8.1 Serial Address/Data Input/Output

(SDA)

SDA is a bidirectional pin used to transfer addresses

and data into and out of the device. Since it is an open-

drain terminal, the SDA bus requires a pull-up resistor

to VCC (typical 10 kΩ for 100 kHz, 2 kΩ for 400 kHz).

For normal data transfer, SDA is allowed to change

only during SCL low. Changes during SCL high are

reserved for indicating Start and Stop conditions.

8.2 Serial Clock (SCL)

The SCL input is used to synchronize the data transfer

to and from the device.

MSOP

1

2

3

4

5

6

7

8

SOT23

—

—

—

2

3

1

5

4

Description

Not Connected

Not Connected

Not Connected

Ground

Serial Address/Data I/O

Serial Clock

Write-Protect Input

+1.8V to 5.5V Power Supply

8.3 Write-Protect (WP)

The WP pin must be connected to either VSS or VCC.

If tied to VSS, normal memory operation is enabled

(read/write the entire memory 000-1FF).

If tied to VCC, write operations are inhibited. The entire

memory will be write-protected. Read operations are

not affected.

This feature allows the user to use the 24XX04 as a

serial ROM when WP is enabled (tied to VCC).

8.4 A0, A1, A2

The A0, A1 and A2 pins are not used by the 24XX04.

They may be left floating or tied to either VSS or VCC.

© 2005 Microchip Technology Inc.

DS21708D-page 11

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