24LC32AT-I/ST 데이터 시트보기 (PDF) - Unspecified

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24LC32AT-I/ST

32K I2C™ Serial EEPROM

Unspecified 

24AA32A/24LC32A

FIGURE 6-2:

RANDOM READ

Bus Activity

Master

S

T

A Control

R Byte

T

Address

High Byte

Address

Low Byte

S

T

A Control

R Byte

T

S

Data

T

Byte

O

P

SDA Line

S

1

0

1

0

A

2

A

1

A

0

0

xxxx

S

1

0

1

0

A

2

A

1

A

0

1

P

A

A

A

A

N

Bus Activity

C

C

C

C

O

K

K

K

K

A

x = “don’t care” bit

C

K

FIGURE 6-3:

Bus Activity

Master

SDA Line

Bus Activity

SEQUENTIAL READ

Control

Byte

Data n

Data n + 1

Data n + 2

A

A

A

A

C

C

C

C

K

K

K

K

S

Data n + x

T

O

P

P

N

O

A

C

K

© 2007 Microchip Technology Inc.

DS21713H-page 11

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