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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

L6452(1999) 데이터 시트보기 (PDF) - STMicroelectronics

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L6452
(Rev.:1999)
ST-Microelectronics
STMicroelectronics ST-Microelectronics
L6452 Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
L6452
PIN FUNCTIONS (continued)
Pin #
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44, 90
45
46 to 50
52 to 64
65
66 to 78
80
81
82
83
84
85
86
87
88
89
91
93
94, 95
96, 97
98
99
100
Name
NCEn
Latch Data
SDI
SDC
Long Pulse
Short Pulse
_Reset
ConvStart
ADCK
NCOut
CH0_buf
ADDATA
AnalogGND
ADCGND
Va
Vref
CH5..CH1
HSB1..HSB13
Vr
HSA13..HSA1
EnlC
ChSel
S3
UpC/ S2
ResC/S1
_EnCh
ClkC/S0
Step up GND
Step up boost
Vstep up
VDD
Rext
RxB, RxA
VxA, VxB
_ONenable
CRclock
CRdata
Fu nction
A high level enables the internal current sources and disables all DMOS outputs. To
be active, the internal current sources must have their corrsponding bit set in the 16 bit
latch and Long Pulse must be set to low level. A low level enables the internal HSA/B
short circuit detection
A rising edge latches the 16 bit stored in the shift register in the 16 bit latch
Serial data input of the shift register
The data bit presented to the Serial Data Input pin is stored into the register on the
rising edge of this pin
A low level activates all outputs having their coresponding bit in the 16 bit latch set
(this pin has an internal pull-up resistor)
A low level activates all outputs having their coresponding bit in the 16 bit latch reset
(this pin has an internal pull-up resistor)
A low level disables all functions and clears all registers
A high level enables the A/D to start the new conversion
A/D clock signal; the ADDATA signal are valid on the falling edge of this pin
If Nozzle Check Enable is high this output provides a high level when the open load is
detected on the output. If Nozzle Check Enable is low this output provides a high level
when a short circuit is detected on HSA/B output
Analog output signal (CH0 buffered)
A/D serial data output
Analog ground connection
Ground of internal ADC
Power supply
Reference voltage generator
A/D input signals
Head selector address output channel B
Head Select Power Supply
Head selector address output channel A
A high level enables the counter and the internal decoder will activate of the HSx
outputs according to the counter’s outputs. Signal S0 becomes Clock Counter and S1
becomes Reset Counter
A low level enables channel A and a high level enables channel B
Decoder input signals when Enable Counter is low
A high level enables the internal counter to up counting. A low level enables down
counting
A low level resets the internal counter
A low level enables the selected channel (this input has an internal pull up resistor)
A high level clocks the internal counter
Ground of step up block
Boost voltage
Driving voltage of power DMOS stage
5V logic supply
An external resistor connected versus ground fixes the internal current source value
Current source outputs
RxA, RxB voltage after an optional external filter
A low level enables the current source generator according the _A/B and ON/_OFF
control register bit
Data on pin CRdata are stored into the register on the rising edge of this pin
Control register serial data input
3/16

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