Z86E73 데이터 시트보기 (PDF) - Zilog

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Z86E73

OTP IR MICROCONTROLLERS

Zilog 

Z86E72/E73

OTP IR Microcontrollers

PIN DESCRIPTION (Continued)

A9

A10

A11

A12

N/C

N/C

N/C

A13

A14

/PGM

A4

33

34

35

36

37

38

39

40

41

42

43

44

1

31 29 27 25

Z86E72/73

QFP

3 57 9

23

22

21

20

19

18

17

16

15

14

13

12

11

/CE

N/C

N/C

N/C

N/C

VSS

N/C

N/C

VPP

EPM

/OE

Figure 8. 44-Pin QFP Pin Assignments (EPROM Mode)

40-Pin

DIP #

26

27

30

34

5

6

7

10

28

29

32

33

8

9

12

13

44-Pin

PLCC #

40

41

44

5

17

18

19

22

42

43

3

4

20

21

25

26

Table 1. Pin Identification (Standard Mode)

44-Pin

QFP #

23

24

27

32

44

1

2

5

25

26

30

31

3

4

8

9

Symbol

P00

P01

P02

P03

P04

P05

P06

P07

P10

P11

P12

P13

P14

P15

P16

P17

Direction

Input/Output

Input/Output

Input/Output

Input/Output

Input/Output

Input/Output

Input/Output

Input/Output

Input/Output

Input/Output

Input/Output

Input/Output

Input/Output

Input/Output

Input/Output

Input/Output

Description

Port 0 is Nibble Programmable.

Port 0 can be configured as A15-A8

external program

ROM Address Bus.

Port 0 can be configured as a

mouse/trackball input.

Port 1 is byte programmable.

Port 1 can be configured as multiplexed

A7-A0/D7-D0 external program ROM

Address/Data Bus

.

1-6

PRELIMINARY

DS96LVO1100

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