Z80382 데이터 시트보기 (PDF) - Zilog
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Z80382 Datasheet PDF : 77 Pages
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Z80382/Z8L382
High-Performance Data Communications Processors
Zilog
AC CHARACTERISTICS (Continued)
ASCI/CSIO Timing - Baud Rate Generator, /CTSA, /DCDA, and /RTSA Timing (See Figures 13, 14 and 15)
Specifications apply over Standard Operating Conditions unless otherwise noted. CL = 50 pF for outputs.
Symbol
t88
t89
t90
t91
t92
t93
t94
t95
Parameter
BUSCLK High to BRG Output Delay
BRG Output Fall Time
BRG Output Rise Time
/CTS Low Time
/CTS High Time
/DCD Low Time
/DCD High Time
BUSCLK Low to /RTS Valid
Z80382
Min.
Max.
30
10
10
100
100
100
100
20
Z8L382
Min.
Max.
40
15
15
100
100
100
100
20
Units
ns
ns
ns
ns
ns
ns
ns
ns
BUSCLK
CKA or CKS
(output)
t88
t88
t89
t90
Figure 13. Baud Rate Generator Timing
20
PRELIMINARY
DS97Z382000
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