XRD8785 데이터 시트보기 (PDF) - Exar Corporation

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XRD8785

CMOS 8-Bit High Speed Analog-to-Digital Converter

Exar Corporation 

XRD8785

Figure 5. Equivalent Input Circuit

Figure 6. Typical Circuit Connections

APPLICATION NOTES

Signals should not exceed VDD +0.5V or go below GND

–0.5V. All pins have internal protection diodes that will

protect them from short transients (<100µs) outside

the supply range.

AGND and DGND pins are connected internally

through the P-substrate. DC voltage differences be-

tween GND pins will cause undesirable internal sub-

strate currents.

The power supply (VDD) and reference voltage (VRT &

VRB) pins should be decoupled with 0.1µF and 10µF

capacitors to AGND, placed as close to the chip as

possible.

The digital outputs should not drive long wires or buses.

The capacitive coupling and reflections will contribute

noise to the conversion.

To avoid timing errors, use the rising edge of the sample

clock (CLK) to latch data from the XRD8785 to other

parts of the system.

The reference can be biased internally by shorting VRT

to VRTS and VRB to VRBS. This will generate 0.6V at VRB

and 2.6V at VRT (see Figure 5).

If the internal reference pins VRTS and/or VRBS are not

used, they should be left unconnected.

The output enable pin (OE) should not be left uncon-

nected. If not controlled by an active signal then it must

be tied to a logic low value.

Rev. 3.00

6

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