LC78011E 데이터 시트보기 (PDF) - SANYO -> Panasonic
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LC78011E Datasheet PDF : 13 Pages
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LC78011E
Continued from preceding page.
Pin No.
40
41
42
43
Symbol
BLANK
CSYNC
HSYNC
YUVSEL1
44
YUVSEL2
I/O Polarity
Function
IN Positive Composite blanking signal input (HBLANK + VBLANK)
IN Negative Composite synchronizing signal input (HSYNC + VSYNC)
IN Negative Horizontal synchronizing signal input (HSYNC)
IN Positive Signal input setup
YUVSEL1 YUVSEL2
Video signal input signal mode
0
0
RYIN = R in, GUIN = G in, BVIN = B in
IN Positive
1
0
RYIN = Y in, GUIN = U in, BVIN = V in
0
1
RYIN = Y in, GUIN = none, BVIN = UV in
1
1
— (Illegal setting)
45
RYIN7
IN Positive R/Y data input (MSB)
A pull-down resistor is built in.
46
RYIN6
IN Positive R/Y data input
A pull-down resistor is built in.
47
RYIN5
IN Positive R/Y data input
A pull-down resistor is built in.
48
RYIN4
IN Positive R/Y data input
A pull-down resistor is built in.
Notes:1. The voltage applied as the digital system power supply voltage must not exceed the voltage applied as the analog system power supply voltage.
2. Unused input pins must be tied high or low. If the OSD inputs are not used, tie OSBLK (pin 39) low.
3. Note that the clock input frequencies (CLKI: pin 6, and FSCIN: pin 7) depend on the TV subcarrier pull-in range. The CLKI input clock and the
FSCIN clock must be synchronized.
Specifications
Absolute Maximum Ratings
Parameter
Maximum supply voltage
Input voltage
Output voltage
Allowable power dissipation
Operating temperature
Storage temperature
Symbol
VDD1 max
VDD2 max
VIN
VOUT
Pd max
Topr
Tstg
Conditions
DVDD (DVDD ≤ AVDD)
AVDD
RYIN0 to RYIN7, GUIN0 to GUIN7,
BVIN0 to BVIN7, CLKI, FSCIN,
OSRIN, OSGIN, OSBIN, OSBLK,
BLANK, CSYNC, HSYNC, RESET,
CCSEL, NPSEL, PMSEL, CDGSEL,
YUVSEL1, YUVSEL2, and TEST
CROUT, YOUT, and BIAS
Ta = 25°C
Ratings
Unit
DVSS – 0.3 to DVSS +7.0
V
AVSS – 0.3 to AVSS +7.0
V
DVSS – 0.3 to DVDD +0.3
V
DVSS – 0.3 to DVDD +0.3
V
500
mW
–20 to +75
°C
–40 to +125
°C
Allowable Operating Ranges at Ta = –20 to 75°C unless otherwise specified
Parameter
Supply voltage
Input high-level voltage
Input low-level voltage
Clock frequency
Symbol
Conditions
VDD1
VDD2
VIH1
VIH2
VIL1
VIL2
fIN1
fIN2
DVDD (DVDD ≤ AVDD)
AVDD
OSRIN, OSGIN, OSBIN, OSBLK
CCSEL, NPSEL, PMSEL, CDGSEL,
YUVSEL1, YUVSEL2, TEST
RYIN0 to RYIN7, GUIN0 to GUIN7,
BVIN0 to BVIN7, BLANK, CSYNC
HSYNC, RESET
OSRIN, OSGIN, OSBIN, OSBLK
CCSEL, NPSEL, PMSEL, CDGSEL,
YUVSEL1, YUVSEL2, TEST
RYIN0 to RYIN7, GUIN0 to GUIN7,
BVIN0 to BVIN7, BLANK, CSYNC
HSYNC, RESET
NTSC
CLKI
PAL
PAL-M
NTSC
FSCIN
PAL
PAL-M
min
3.0
4.5
Ratings
typ
5.0
Unit
max
5.5 V
5.5 V
0.7 VDD1
VDD1 + 0.3 V
2.2
VDD1 + 0.3 V
VSS1 – 0.3
0.3 VDD1 V
VSS1 – 0.3
0.8 V
14.31818
17.734475
14.3024459
3.579545
4.43361875
3.57561149
MHz
MHz
MHz
MHz
MHz
MHz
Continued on next page.
No. 5755-4/13
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