X4283 데이터 시트보기 (PDF) - Xicor -> Intersil

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X4283

CPU Supervisor with 128K EEPROM

Xicor -> Intersil 

X4283/85 – Preliminary Information

Power-Up and Power-Down Timing

VCC

VTRIP

0 Volts

tPURST

tPURST

tF

tR

tRPD

RESET

(X4285)

RESET

(X4283)

RESET Output Timing

Symbol

VTRIP

tPURST

tRPD(8)

tF(8)

tR(8)

VRVALID

Parameter

Reset Trip Point Voltage, X4283/85-4.5A

Reset Trip Point Voltage, X4283/85

Reset Trip Point Voltage, X4283/85-2.7A

Reset Trip Point Voltage, X4283/85-2.7

Power-up Reset Time out

VCC Detect to Reset/Output

VCC Fall Time

VCC Rise Time

Reset Valid VCC

Note: (8) This parameter is periodically sampled and not 100% tested.

SDA vs. RESET Timing

SCL

SDA

tRSP

tRSP<tWDO

tRSP>tWDO

VRVALID

VRVALID

Min.

4.5

4.25

2.85

2.55

100

100

100

1

Typ.

4.62

4.38

2.92

2.62

250

Max.

4.75

4.5

3.0

2.7

400

500

Unit

V

ms

ns

µs

µs

V

tRST

tRSP>tWDO

tRST

RESET

Note: All inputs are ignored during the active reset period (tRST).

REV 1.17 11/27/00

www.xicor.com

Characteristics subject to change without notice. 17 of 22

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