W83195BG-118 데이터 시트보기 (PDF) - Winbond

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W83195BG-118

Clock Generator

Winbond 

W83195BR-118/W83195BG-118

STEPLESS FOR INTEL 915/945 CHIPSETS

4. BLOCK DIAGRAM

X IN

XOUT

F S (0 :2 )

VTT_PW RGD#

&SEL24_48#

PD

*S D A T A

*S C L K

PLL2

XTAL

OSC

PLL1

S p re a d

S p e c tru m

VC O C LK

D ivid er

M /N /R atio

ROM

D ivider

L a tc h

&POR

C o n trol

L o gic

& C o nfig

R eg ister

I2 C

In terface

48M Hz

24_48M H z

DOTT

DOTC

2

R E F 0:1

2

C PU T 0:1

C P U C 0:1

2

SRCT

SRCC

5

P C IE T 0:4

P C IE C 0:4

5

3

P C I_F 0:2

6

P C I 0:5

RESET#

475

5. PIN DESCRIPTION

BUFFER TYPE SYMBOL

IN

INtp120k

INtd120k

OUT

OD

I/OD

#

*

&

DESCRIPTION

Input

Latched input at power up, internal 120kΩ pull up.

Latched input at power up, internal 120kΩ pull down.

Output

Open Drain

Bi-directional Pin, Open Drain.

Active Low

Internal 120kΩ pull-up

Internal 120 kΩ pull-down

Publication Release Date: May 2006

-3-

Revision 0.81

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