W83194BR-PT
7.3 Register 2: PCI Clock Control (1 = Enable, 0 = Stopped) (Default = FFh)
BIT
PIN NO PWD
7
21
1 PCI7 output control
6
19
1 PCI6 output control
5
18
1 PCI5 output control
4
17
1 PCI4 output control
3
15
1 PCI3 output control
2
14
1 PCI2 output control
1
12
1 PCI1 output control
0
11
1 PCI0 output control
DESCRIPTION
7.4 Register 3: PCI, REF, 48MHz Clock Control (1 = Enable, 0 = Stopped) (Default = F8h)
BIT
PIN NO PWD
DESCRIPTION
7
7
1 48MHZ output control
6
8
1 24_48MHz output control
5
1
1 REF output control
4
10
1 PCI8 output control
3
-
1 Reserved
2
-
0 Reserved
1
32
X Invert Ratio_1 read back
0
31
X Invert Ratio_0 read back
7.5 Register 4:MULTISEL1 IOAPIC, AGP Control (1 = Enable, 0 = Stopped) (Default = 7Fh)
BIT
PIN NO PWD
DESCRIPTION
7
-
0 MULTISEL1 I2C R/W
6
-
1 Reserved
5
-
1 Reserved
4
45
1 IOAPIC1 output control
3
46
1 IOAPIC0 output control
2
27
1 AGP2 output control
1
26
1 AGP1 output control
0
23
1 AGP0 output control
-8-