W48C111-16H 데이터 시트보기 (PDF) - Cypress Semiconductor

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W48C111-16H

Frequency Generator for Integrated Core Logic

Cypress Semiconductor 

PRELIMINARY

W48C111-16

Spread Spectrum Feature

The device generates a clock that is frequency modulated in

order to increase the bandwidth that it occupies. By increasing

the bandwidth of the fundamental and its harmonics, the am-

plitudes of the radiated electromagnetic emissions are re-

duced. This effect is depicted in Figure 1.

As shown in Figure 1, a harmonic of a modulated clock has a

much lower amplitude than that of an unmodulated signal. The

reduction in amplitude is dependent on the harmonic number

and the frequency deviation or spread. The equation for the

reduction is:

dB = 6.5 + 9*log10(P) + 9*log10(F)

Where P is the percentage of deviation and F is the frequency

in MHz where the reduction is measured.

The output clock is modulated with a waveform depicted in

Figure 2. This waveform, as discussed in “Spread Spectrum

Clock Generation for the Reduction of Radiated Emissions” by

Bush, Fessler, and Hardin produces the maximum reduction

in the amplitude of radiated electromagnetic emissions. The

deviation selected for this chip is ±0.5% of the center frequen-

cy. Figure 2 details the Cypress spreading pattern. Cypress

does offer options with more spread and greater EMI reduc-

tion. Contact your local Sales representative for details on

these devices.

Spread Spectrum clocking is always active on this device.

5 d B /d iv

S SFTG

Typical C lock

-SS% Frequency Span (MHz) +SS%

Figure 1. Clock Harmonic with and without SSCG Modulation Frequency Domain Representation

MAX (+0.5%)

MIN (–0.5%)

Figure 2. Typical Modulation Profile

3

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