W164(1999) 데이터 시트보기 (PDF) - Cypress Semiconductor

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W164
(Rev.:1999)

Spread Spectrum Desktop/Notebook System Frequency Generator

Cypress Semiconductor 

W164

48-MHz and 24-MHz Clock Output (Lump Capacitance Test Load = 20 pF)

Parameter

Description

f

Frequency, Actual

Test Condition/Comments

Determined by PLL divider ratio (see m/n below)

fD

Deviation from 48 MHz

(48.008 – 48)/48

m/n

PLL Ratio

(14.31818 MHz x 57/17 = 48.008 MHz)

tR

Output Rise Edge Rate Measured from 0.4V to 2.4V

tF

Output Fall Edge Rate

Measured from 2.4V to 0.4V

tD

Duty Cycle

Measured on rising and falling edge at 1.5V

fST

Frequency Stabilization Assumes full supply voltage reached within 1 ms

from Power-up (cold start) from power-up. Short cycles exist prior to fre-

quency stabilization.

Zo

AC Output Impedance

Average value during switching transition. Used

for determining series termination value.

CPU = 66.8/100 MHz

Min. Typ. Max. Unit

48.008

24.004

MHz

+167

ppm

57/17, 57/34

0.5

2 V/ns

0.5

2 V/ns

45

55 %

3

ms

25

Ω

Ordering Information

Ordering Code

Package

Name

W164

G

Package Type

28-pin SOIC (300 mils)

Document #: 38-00841

10

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