W149(2000) 데이터 시트보기 (PDF) - Cypress Semiconductor
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W149 Datasheet PDF : 14 Pages
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W149
48-MHz Clock Output (Lump Capacitance Test Load = 20 pF= 66.6/100 MHz
Parameter
Description
Test Condition/Comments
f
Frequency, Actual
Determined by PLL divider ratio (see m/n below)
fD
Deviation from 48 MHz (48.008 – 48)/48
m/n
PLL Ratio
(14.31818 MHz x 57/17 = 48.008 MHz)
tR
Output Rise Edge
Measured from 0.4V to 2.4V
Rate
tF
Output Fall Edge Rate Measured from 2.4V to 0.4V
tD
Duty Cycle
Measured on rising and falling edge at 1.5V
fST
Frequency Stabiliza- Assumes full supply voltage reached within 1 ms from
tion from Power-up power-up. Short cycles exist prior to frequency stabili-
(cold start)
zation.
Zo
AC Output Impedance Average value during switching transition. Used for de-
termining series termination value.
CPU = 66.6/100 MHz
Min. Typ. Max.
48.008
+167
57/17
0.5
2
0.5
2
45
55
3
40
Unit
MHz
ppm
V/ns
V/ns
%
ms
Ω
24-MHz Clock Output (Lump Capacitance Test Load = 20 pF= 66.6/100 MHz
Parameter
Description
Test Condition/Comments
f
Frequency, Actual
Determined by PLL divider ratio (see m/n below)
fD
Deviation from 24 MHz (24.004 – 24)/24
m/n
PLL Ratio
(14.31818 MHz x 57/34 = 24.004 MHz)
tR
Output Rise Edge Rate Measured from 0.4V to 2.4V
tF
Output Fall Edge Rate Measured from 2.4V to 0.4V
tD
Duty Cycle
Measured on rising and falling edge at 1.5V
fST
Frequency Stabiliza- Assumes full supply voltage reached within 1 ms from
tion from Power-up
power-up. Short cycles exist prior to frequency stabili-
(cold start)
zation.
Zo
AC Output Impedance Average value during switching transition. Used for de-
termining series termination value.
CPU = 66.6/100 MHz
Min. Typ. Max.
24.004
+167
57/34
0.5
2
0.5
2
45
55
3
40
Unit
MHz
ppm
V/ns
V/ns
%
ms
Ω
Ordering Information
Ordering Code
Package
Name
W149
H
Package Type
48-Pin SSOP (300-mil)
Document #: 38-00856-A
13
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