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V55C2128164V

128Mbit LOW-POWER SDRAM 2.5 VOLT, TSOP II / BGA PACKAGE 8M X 16

Mosel Vitelic Corporation  

MOSEL VITELIC

V55C2128164V(T/B)

Description Pkg.

TSOP-II

T

Pin Count

54

V 55 C 2 12816 4 S

Mosel Vitelic

Manufactured

Low Power

Synchronous DRAM

Device

Number

C=CMOS Family

2.5V Supply Voltage

8Mx16(4K Refresh)

4 Banks

XT

Speed

6 ns

7 ns

8 ns

10 ns Component

Package

Component Rev Level

A = 0.14um

S=STTL

54 Pin Plastic TSOP-II

PIN CONFIGURATION

Top View

VCC 1

I/O1 2

VCCQ 3

I/O2 4

I/O3 5

VSSQ 6

I/O4 7

I/O5 8

VCCQ 9

I/O6 10

I/O7 11

VSSQ 12

I/O8 13

VCC 14

LDQM 15

WE 16

CAS 17

RAS 18

CS 19

BA0 20

BA1 21

A10 22

A0 23

A1 24

A2 25

A3 26

VCC 27

54 VSS

53 I/O16

52 VSSQ

51 I/O15

50 I/O14

49 VCCQ

48 I/O13

47 I/O12

46 VSSQ

45 I/O11

44 I/O10

43 VCCQ

42 I/O9

41 VSS

40 NC

39 UDQM

38 CLK

37 CKE

36 NC

35 A11

34 A9

33 A8

32 A7

31 A6

30 A5

29 A4

28 VSS

Pin Names

CLK

CKE

CS

RAS

CAS

WE

A0–A11

BA0, BA1

I/O1–I/O16

LDQM, UDQM

VCC

VSS

VCCQ

VSSQ

NC

Clock Input

Clock Enable

Chip Select

Row Address Strobe

Column Address Strobe

Write Enable

Address Inputs

Bank Select

Data Input/Output

Data Mask

Power (+2.5V)

Ground

Power for I/O’s (+1.8V)

Ground for I/O’s

Not connected

V55C2128164V(T/B) Rev. 1.2 August 2002

3

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