UPD72870AF1 데이터 시트보기 (PDF) - NEC => Renesas Technology

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UPD72870AF1

IEEE1394 1-CHIP OHCI HOST CONTROLLER

NEC => Renesas Technology 

PHY Block Diagram

µPD72870A

PHY Control

Signal

(CMC,PC0-PC2)

PHY/Link

Interface

Link

Interface

I/O

Cable

Power

Status

Remark Cable Port:

Cable

Port1

Arbitration

and Control

State Machine

Logic

Cable

Port2

Cable

Port3

Receive Data

Decoder and

Retimer

Transmit Data

Encoder

Voltage

and

Current

Generator

Crystal

Oscillator

PLL

System

and

Transmit

Clock

Generator

Cable

Interface

PHY

Signal

4

Preliminary Data Sheet S14653EJ1V0DS00

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