UPD16662 데이터 시트보기 (PDF) - NEC => Renesas Technology

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UPD16662

240 OUTPUT LCD COLUMN (SEGMENT) DRIVER WITH BUILT-IN RAM

NEC => Renesas Technology 

Block Diagram

DIR

PL0, PL1

TEST

A0 - A16

Control

/CS, /OE,

/WE, /UBE

RDY

BMODE

D0 - D15

Address

input

control

Address

management

control

Data bus

control

/REFRH

/RESET

MS

OSC1

OSC2

/DOFF

3.3 V operation

STOP

CR

oscillator

Liquid crystal

timing generation

PULSE /FRM STB

5.0 V operation

Arbiter

Gray scale

generation

circuit

Internal timing

generation

Self-diagnosis

circuit

Level shifter

RAM

240 x 160 x 2 bit

Data latch (1)

Data latch (2)

Gray level control

DEC

µPD16662

3.3 V operation

5.0 V operation

V0

Liquid crystal drive circuit

240 outputs

V1

V2

PULSE

/FRM STB /DOUT L1 L2 Y1 Y2 Y3

Y240

3

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