Philips Semiconductors
96 kHz IEC 958 audio DAC
Preliminary specification
UDA1351H
The IEC 958 input audio data including the accompanying
pre-emphasis information is available on the output data
interface.
A lock indication signal is available on pin LOCK indicating
that the IEC 958 decoder is locked.
By default the DAC output and the data output interface
are muted when the decoder is out-of-lock. However, this
setting can be overruled in the L3 control mode.
4 QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
Supplies
VDDD
VDDA
IDDA(DAC)
IDDA(PLL)
IDDD(C)
IDDD
P
digital supply voltage
analog supply voltage
analog supply current of DAC
analog supply current of PLL
digital supply current of core
digital supply current
power consumption at 48 kHz
power consumption at 96 kHz
2.7 3.0 3.6 V
2.7 3.0 3.6 V
power-on
−
8.0 −
mA
power-down
−
750 −
µA
at 48 kHz
−
0.7 −
mA
at 96 kHz
−
1.0 −
mA
at 48 kHz
−
16.0 −
mA
at 96 kHz
−
24.5 −
mA
at 48 kHz
−
2.0 −
mA
at 96 kHz
−
3.0 −
mA
DAC in playback mode −
80
−
mW
DAC in Power-down mode −
58
−
mW
DAC in playback mode −
109 −
mW
DAC in Power-down mode −
87
−
mW
General
trst
reset active time
Tamb
ambient temperature
Digital-to-analog converter
−
250 −
µs
−40 −
+85 °C
Vo(rms)
(THD + N)/S
S/N
αcs
∆Vo
output voltage (RMS value)
note 1
−
total harmonic distortion-plus-noise to fi = 1.0 kHz tone at 48 kHz
signal ratio
at 0 dB
−
at −40 dB; A-weighted −
fi = 1.0 kHz tone at 96 kHz
at 0 dB
−
at −40 dB; A-weighted −
signal-to-noise ratio at 48 kHz
fi = 1.0 kHz tone;
95
code = 0; A-weighted
signal-to-noise ratio at 96 kHz
fi = 1.0 kHz tone;
95
code = 0; A-weighted
channel separation
fi = 1.0 kHz tone
−
unbalance of output voltages
fi = 1.0 kHz tone
0.4
900 −
mV
−90 −85 dB
−60 −55 dB
−85 −80 dB
−58 −53 dB
100 −
dB
100 −
dB
96
−
dB
0.1 −
dB
Note
1. The DAC output voltage is proportionally to the DAC power supply voltage.
2000 Feb 18
4