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Z84C0008FEC 데이터 시트보기 (PDF) - Zilog

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Z84C0008FEC Datasheet PDF : 2 Pages
1 2
ZILOG
Z8400/84C00
FEATURES
s The Extensive Instruction Set.Contains 158 Instructions,
Including the 8080A Instructions Set as a Subset.
s Single 5 Volt Power Supply
s NMOS Version for Low Cost, High Performance
Solutions; CMOS Version for High Performance, Low
Power Designs.
s NMOS Z084004 - 4 MHz
Z0840006 - 6.17 MHz
Z084008 - 8 MHz
s CMOS Z0840006 - DC to 6.17 MHz
Z84C0008 - DC to 8 MHz
Z84C0010 - DC to 10 MHz
Z84C0020 - DC to 20 MHz
s 6 MHz Version can be Operated at 6.144 MHz Clock
Speed
Z8400/84C00
NMOS/CMOS Z80 CPU
CENTRAL PROCESSING UNIT
s The Z80 Microprocessors and Associated Family of
Peripherals can be Linked by a Vectored Interrupt
System. This System can be Daisy-Chained to Allow
Implementation of a Priority Interrupt Scheme.
s Duplicate Set of Both General-Purpose and Flag
Registers
s Two 16-Bit Index Registers
s Three Modes of Maskable Interrupts:
- Mode 0 - 8080A Similar
- Mode 1 - Non-Z80 Environment, Location 38H
- Mode 2 - Z80 Family Peripherals, Vectored Interrupts
s On-Chip Dynamic Memory Refresh Counter
GENERAL DESCRIPTION
The Z8400/Z84C00 CPUs are fourth-generation enhanced
microprocessors with exceptional computational power.
They offer higher system throughput and more efficient
memory utilization than comparable second- and third-
generation microprocessors. The speed offerings from 6 -
20 MHz suit a wide range of applications which migrate
software. The internal registers contain 208 bits of read/
write memory that are accessible to the programmer.
These registers include two sets of six general purpose
registers which may be used individually as either 8-bit
registers or as 16-bit register pairs. In addition, there are
two sets of accumulator and flag registers. A group of
“Exchange” instructions makes either set of main or alter-
nate registers accessible to the programmer. The alter-
nate set allows operation in foreground-background mode
or it may be reserved for very fast interrupt response.
The CPU also contains a Stack Pointer, Program Counter,
two index registers, a Refresh register (counter), and an
Interrupt register. The CPU is easy to incorporate into a
system since it requires only a single +5V power source. All
output signals are fully decoded and timed to control
standard memory or peripheral circuits; the CPU is sup-
ported by an extensive family of peripheral controllers.

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