U635H64 데이터 시트보기 (PDF) - Simtek Corporation

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U635H64

PowerStore 8K x 8 nvSRAM

Simtek Corporation 

U635H64

Software Nonvolatile RECALL

A RECALL cycle of the EEPROM data into the SRAM

is initiated with a sequence of READ operations in a

manner similar to the STORE initiation. To initiate the

RECALL cycle the following sequence of READ opera-

tions must be performed:

1. Read address 0000 (hex) Valid READ

2. Read address 1555 (hex) Valid READ

3. Read address 0AAA (hex) Valid READ

4. Read address 1FFF (hex) Valid READ

5. Read address 10F0 (hex) Valid READ

6. Read address 0F0E (hex) Initiate RECALL

Internally, RECALL is a two step procedure. First, the

SRAM data is cleared and second, the nonvolatile

information is transferred into the SRAM cells. The

RECALL operation in no way alters the data in the

EEPROM cells. The nonvolatile data can be recalled an

unlimited number of times.

Hardware Protection

The U635H64 offers hardware protection against inad-

vertent STORE operation through VCC Sense. When

VCC < VSWITCH all software controlled STORE operati-

ons will be inhibited.

Low Average Active Power

The U635H64 has been designed to draw significantly

less power when E is LOW (chip enabled) but the

access cycle time is longer than 55 ns.

When E is HIGH the chip consumes only standby cur-

rent.

The overall average current drawn by the part depends

on the following items:

1. CMOS or TTL input levels

2. the time during which the chip is disabled (E HIGH)

3. the cycle time for accesses (E LOW)

4. the ratio of READs to WRITEs

5. the operating temperature

6. the VCC level

The information describes the type of component and shall not be considered as assured characteristics. Terms of

delivery and rights to change design reserved.

STK Control #ML0052 12

Rev 1.0

March 31, 2006

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