IDT71028S17Y 데이터 시트보기 (PDF) - Integrated Device Technology
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IDT71028S17Y Datasheet PDF : 7 Pages
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IDT71028
CMOS STATIC RAM 1 MEG (256K x 4-BIT)
COMMERCIAL TEMPERATURE RANGE
AC ELECTRICAL CHARACTERISTICS (VCC = 5.0V ± 10%, Commercial Temperature Range)
Symbol Parameter
71028S12(1) 71028S15 71028S17 71028S20
Min. Max. Min. Max. Min. Max. Min. Max. Unit
Read Cycle
tRC
Read Cycle Time
12 — 15 — 17 — 20 —
ns
tAA
Address Access Time
— 12 — 15 — 17 — 20
ns
tACS
tCLZ(2)
tCHZ(2)
Chip Select Access Time
Chip Select to Output in Low-Z
Chip Deselect to Output in High-Z
— 12 — 15 — 17 — 20
ns
3—
3—3
—3—
ns
06
070
808
ns
tOE
tOLZ(2)
tOHZ(2)
Output Enable to Output Valid
Output Enable to Output in Low-Z
Output Disable to Output in High-Z
—6 —7— 8—8
ns
0—
0—0
—0—
ns
05
050
607
ns
tOH
tPU(2)
tPD(2)
Output Hold from Address Change
Chip Select to Power Up Time
Chip Deselect to Power Down Time
4—
4—4
—4—
ns
0—
0—0
—0—
ns
— 12 — 15 — 17 — 20
ns
Write Cycle
tWC
Write Cycle Time
12 — 15 — 17 — 20 —
ns
tAW
Address Valid to End of Write
10 — 12 — 13 — 15 —
ns
tCW
Chip Select to End of Write
10 — 12 — 13 — 15 —
ns
tAS
Address Set-up Time
0—
0—0
—0—
ns
tWP
Write Pulse Width
10 — 12 — 13 — 15 —
ns
tWR
Write Recovery Time
0—
0—0
—0—
ns
tDW
Data Valid to End of Write
7—
8—9
—9—
ns
tDH
Data Hold Time
0—
0—0
tOW(2) Output Active from End of Write
3—
3—3
tWHZ(2) Write Enable to Output in High-Z
05
050
NOTES:
1. 12ns specification is preliminary.
2. This parameter guaranteed with the AC load (Figure 2) by device characterization, but is not production tested.
—0—
ns
—4—
ns
708
ns
2966 tbl 08
9.4
4
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