GMS87C1404/GMS87C1408
HYUNDAI MicroElectronics
EAH
EBH
ECH
ECH
EDH
EFH
ADCM
ADCR
BITR1
CKCTLR1
WDTR
PFDR2
-
-
ADEN
ADS2
ADC Result Data Register
Basic Interval Timer Data Register
-
WAKEUP RCWDT WDTON
WDTCL 7-bit Watchdog Counter Register
-
-
-
-
ADS1
BTCL
-
ADS0
BTS2
PFDIS
ADST
BTS1
PFDM
ADSF
BTS0
PFDS
Table 8-3 Control Registers of GMS87C1408 and GMS87C1404
These registers of shaded area can not be accessed by bit manipulation instruction as “SET1, CLR1”, but should be accessed by
register operation instruction as “LDM dp,#imm”.
1.The register BITR and CKCTLR are located at same address. Address ECH is read as BITR, written to CKCTLR.
2.The register PFDR only be implemented on devices, not on In-circuit Emulator.
24
Oct. 1999 Ver 1.0