42754D 데이터 시트보기 (PDF) - Infineon Technologies

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42754D

Low Dropout Linear Fixed Voltage Regulator

Infineon Technologies 

3

Pin Configuration

TLE42754

Pin Configuration

3.1

Pin Assignment TLE42754D (PG-TO252-5) and TLE42754G (PG-TO263-5)

PG-TO252-5 (D-PAK)

GND

PG-TO263-5 (D²-PAK)

1

5

Ι RO D Q

AEP02580

Ι GND Q

RO D

IEP02528

Figure 2 Pin Configuration (top view)

3.2

Pin Definitions and Functions TLE42754D (PG-TO252-5) and TLE42754G (PG-

TO263-5)

Pin Symbol

1

I

2

RO

3

GND

4

D

5

Q

TAB GND

Data Sheet

Function

Input

for compensating line influences, a capacitor to GND close to the IC terminals is

recommended

Reset Output

open collector output; external pull-up resistor to a positive potential required;

leave open if the reset function is not needed

TLE42754G (PG-TO263-5) only: Ground

internally connected to tab

Reset Delay Timing

connect a ceramic capacitor to GND for adjusting the reset delay time;

leave open if the reset function is not needed

Output

block to GND with a capacitor close to the IC terminals, respecting the values given

for its capacitance CQ and ESR in the table “Functional Range” on Page 8

Ground

connect to heatsink area

5

Rev. 1.2, 2014-07-03

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