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CMOS 4M (256 × 16) Pseudo-Static RAM
LH5PV16256
CE VIH
VIL
CS VIH
VIL
RFSH VIH
VIL
A7 - A17
VIH
VIL
OE VIH
VIL
UWE, LWE VIH
VIL
I/O0 - I/O15
VOH
VOL
NOTE: A0 - A6 = Don't Care
tRC
tP
tCE
tCSS
tCSH
tAS
tRAH
ROW ADDRESS
INPUT
tODS
tRCS
OPEN
tP
tRDH
tODH
tRCH
Figure 8. Address Refresh Cycle
5PV16256S-7
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