LH5324C00 데이터 시트보기 (PDF) - Sharp Electronics
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LH5324C00 Datasheet PDF : 6 Pages
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LH5324C00
CMOS 24M (1.5M × 16) MROM
FEATURES
• 1,572,864 × 16 bit organization
• Access time: 120 ns (MAX.)
• Supply current:
– Operating: 80 mA (MAX.)
– Standby: 100 µA (MAX.)
• TTL compatible I/O
• Three-state output
• Single +5 V Power supply
• Static operation
• When the address input at both A19 and
A20 is high level, outputs become high
impedance irrespective of CE or OE.
• Package:
42-pin, 600-mil DIP
• Others:
– Non programmable
– Not designed or rated as radiation
hardened
– CMOS process (P type silicon
substrate)
DESCRIPTION
The LH5324C00 is a 24M-bit mask-programmable
ROM organized as 1,572,864 × 16 bits. It is fabricated
using silicon-gate CMOS process technology.
PIN CONNECTIONS
42-PIN DIP
TOP VIEW
A18 1
A17 2
A7 3
A6 4
A5 5
A4 6
A3 7
A2 8
A1 9
A0 10
CE 11
GND 12
OE 13
D0 14
D8 15
D1 16
D9 17
D2 18
D10 19
D3 20
D11 21
42 A19
41 A8
40 A9
39 A10
38 A11
37 A12
36 A13
35 A14
34 A15
33 A16
32 A20
31 GND
30 D15
29 D7
28 D14
27 D6
26 D13
25 D5
24 D12
23 D4
22 VCC
Figure 1. Pin Connections
5324C00-1
1
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