SAA7197P 데이터 시트보기 (PDF) - Philips Electronics
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SAA7197P Datasheet PDF : 16 Pages
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Philips Semiconductors
Clock Generator Circuit for desktop video systems (CGC)
Product specification
SAA7197
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
Output CREF (pin 15)
VOL
VOH
fCREF
CL
tSU
tHD
output voltage LOW
output voltage HIGH
output frequency CREF
output load capacitance
set-up time
hold time
IOL = 2 mA
0
IOH = −0.5 mA
2.4
Fig.3
−
15
Fig.3; note 1
12
Fig.3; note 1
4
Output signals LLCA, LLCB, LLC2A and LLC2B (pins 7, 10, 14, and 20); note 3
VOL
VOH
tcomp
fLL
tr, tf
tLL
output voltage LOW
output voltage HIGH
composite rise time
output frequency LLCA
output frequency LLCB
output frequency LLC2A
output frequency LLC2B
rise and fall times
duty factor LLCA, LLCB, LLC2A
and LLC2B (mean values)
IOL = 2 mA
0
IOH = −0.5 mA
2.6
Fig.3; notes 1 and 2 −
Fig.3
−
−
−
−
Fig.3
−
note 1; Fig.3;
at 1.5 V level
40
−
0.6
−
VDDD
2 fLFCO(2)
−
40
−
−
−
−
V
V
MHz
pF
ns
ns
−
0.6
−
VDDD
−
8
4 fLFCO(2)
4 fLFCO(2)
2 fLFCO(2)
2 fLFCO(2)
−
5
V
V
ns
MHz
MHz
MHz
MHz
ns
50
60
%
Notes
1. fLFCO = 7.0 MHz and output load 40 pF (Fig.3). VSSA and VSSD short connected together.
2. tcomp is the rise time from LOW of all clocks to HIGH of all clocks (Fig.3) including rise time, skew and jitter
components. Measurements taken between 0.6 V and 2.6 V. Skew between two LLx clocks will not deviate more
than ±2 ns if output loads are matched within 20%.
3. MS and LFCO2 functions not tested.
August 1996
6
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